A small Bazel module that provides reusable VHDL dependency-graph
metadata via
vhdl_library.
Downstream synthesis, simulation, and lint rulesets consume the
resulting
VhdlInfo
provider to drive tools like Vivado, GHDL, NVC, or Modelsim — this
module deliberately doesn't run any of them itself.
Cross-language dependencies are first-class:
vhdl_library.verilog_deps
accepts
rules_verilog
targets and the resolved VerilogInfo chain is carried on
VhdlInfo.verilog_deps, so mixed-language consumers walk one merged
depset per axis.
Quick start, cross-language dep authoring, and the full per-rule / per-provider reference are hosted at https://hw-bzl.github.io/bazel_rules_vhdl/.
Apache License 2.0
Provide foundational vhdl interfaces for Bazel rulesets (e.g., vhdl_library).
@hw-bzl/rules_vhdl